Having waded through dozens of CPU core frequencies for all current members of the M-series families of chips, you might be wondering what they mean for someone considering buying a new Mac. Is the M5 going to prove any faster than an M4, or should they wait until M5 Pro or Max variants become available?

All else being equal, a core that runs at a higher frequency should process instructions more quickly than a similar core running at a lower frequency. But these figures only apply to the CPU cores, and much of their most demanding code is now run on other co-processors and components, including the GPU and neural engine (ANE).

The M5 has specific enhancements to its GPU to accelerate its performance when running compute tasks that can be common in AI and other advanced code. That GPU runs Metal code, and because that’s compiled and prepared by the CPU cores, to obtain maximum performance from its enhanced GPU the CPU cores also need to perform well. CPU cores play other key roles in supporting specialist components, so matching their performance is essential to avoid bottlenecks and achieve balance. One consistently important factor is the speed of memory access: the faster everything goes, the faster data has to be moved around, and that’s why minimising movement using Unified Memory can prove so important, as is the M5’s faster bandwidth of 153 GB/s, compared with 120 GB/s in the base M4.

There’s also more to CPU core performance than just frequencies. Cores can execute instructions out of order, predict load addresses and values, and pull other tricks to ensure that best use is made of every clock cycle. For the M5, Apple has singled out claimed improvements in multithreaded performance, enabling a single core to run multiple threads significantly faster.

Looking just at CPU cores, the table above compares all the M-series chips released to date, ignoring ‘binned’ and other cut-price sub-variants. Columns labelled Σfn are a crude indicator of performance capacity for the whole CPU, obtained by totalling numbers of cores multiplied by their frequency,
(P x fP) + (E x fE)
where P and E are the numbers of P and E cores, and fP and fE are their respective maximum frequencies. It’s here worth mentioning what a monster the M3 Ultra is in comparison to any other M-series chip.

Because M5 core frequencies don’t currently include Pro or Max variants, those given are starting points. I’d expect to see P cores in the M5 Pro and Max variants reach a maximum frequency of at least 4.7 GHz, although their E cores may be restricted to a lower maximum than the 3.05 GHz of the base variant, to ensure they achieve good economy, as for the M4.

Base variants in Apple’s M-series chips have the fewest P cores in each family, only 4, typically half the number of their Pro variant. Although those should be ample for much of the time, when there are too many high priority (Quality of Service) threads running for user apps, some may overflow to be run on the E cores instead. This is where those frequency tables come into play, as those E cores will be run at higher frequencies to compensate. As the maximum frequency of the E cores in an M5 (3048 MHz) is significantly higher than that of a base M4 (2892 MHz), the base M5 should run those overflowed threads faster.

Another important aspect of the M5 that isn’t clear yet is which version of the Arm Instruction Set Architecture (ISA) it supports. The M4 surprised us with its support of the Armv9.2A ISA, and this year’s A19 and M5 chips are believed to support 9.4A or possibly 8.7. This is particularly relevant to security, as either of those should bring support for Arm’s Enhanced Memory Tagging Extension, which is required to support Apple’s new Memory Integrity Enforcement (MIE), already announced for the A19. Early reports are that the M5 does indeed support the required ISA and its extension, ready for the implementation of MIE in the coming months, if it’s not already built into macOS 26 Tahoe.

Like much else in the base M5 chip, frequencies and features are largely evolutionary, but its enhanced support for GPU compute, faster memory and improved multithreaded performance should deliver substantial improvements. If it’s also the first Mac chip to support Apple’s new security feature MIE, the base M4 is outclassed.

Thanks to your overwhelming response to my appeal for information about CPU core frequencies in M3 Ultra and M5 base chips, this article updates the data to cover those new models in addition to all previous M-series chips.

Performance (P) and Efficiency (E) CPU cores in Apple silicon Macs are run at a range of different frequencies so they can deliver optimum performance with a minimum power and energy use. Cores are grouped into clusters of 2-6, and macOS sets the frequency of each cluster according to workload, Quality of Service, power mode and thermal status. Maximum frequencies differ according to the family, variant within that family, and between E and P cores. Current values are:

• M1 E 2064 MHz or 2.1 GHz; P 3228 MHz or 3.2 GHz;
• M2 E 2424 MHz or 2.4 GHz; P 3696 MHz or 3.7 GHz;
• M3 E 2748 MHz or 2.7 GHz; P 4056 MHz or 4.1 GHz;
• M4 E 2892 MHz or 2.9 GHz; P 4512 MHz or 4.5 GHz.
• M5 E 3048 MHz or 3.0 GHz; P 4608 MHz or 4.6 GHz (base variant only).

As Pro and Max variants may have higher frequencies than base variants, it’s likely that future M5 Pro or M5 Max chips will be able to run their P cores at a higher maximum frequency than today’s base M5 chip.

The full table of frequencies reported by powermetrics is:

This is available for download as a Numbers spreadsheet and in CSV format here: mxfreqs1025

Earlier this year I published a detailed analysis of frequencies in the M1 to M4 families. The only addition to those is the M3 Ultra, whose frequencies are the same as those of the M3 Max, so they haven’t changed. The remainder of this article concentrates on the base variant in each family, from M1 to M5, the chips that power the most popular models and set the standard for what most folk will experience.

Frequency range

Over the last five years and five families of chips, their frequencies have increased steadily, as shown in the charts below. Each bar in those charts spans the range of frequencies from minimum (idle) to maximum, for the base variant in that family.

Idle frequency in E cores has risen from 600 MHz to 972 MHz, a rise of over 60%, and their maximum frequency has risen from 2064 MHz to 3048 MHz, a rise of nearly 50%.

P cores have seen more substantial change. Their idle frequency has risen from 600 MHz to 1308 MHz, a much larger rise of nearly 120%, and their maximum frequency has risen from 3204 MHz to 4608 MHz, just under 50%. The M5 is notable for its greater rise in idle frequency, and lesser rise in maximum frequency.

Frequency steps

Rather than macOS set an arbitrary frequency, it selects one from a list of steps that are distinctive to that family and variant. Looking at the table of frequency steps it might be easy to assume those numbers are chosen arbitrarily, but when expressed appropriately I think you can see there’s more to them.

To look at frequency steps and the frequencies chosen for them, let me explain how I have converted raw frequencies to make them comparable.

First, I work out the steps as evenly spaced points along a line from 0.0, representing idle, to 1.0, representing the core’s maximum frequency. For each of those evenly spaced steps, I calculate a normalised frequency, as
(Fmax – Fstep)/(Fmax – Fidle)
where Fidle is the idle (lowest) frequency value, Fmax is the highest, and Fstep is the actual frequency set for that step.

For example, say a core has an idle frequency of 500 MHz, a maximum of 1,500 MHz, and only one step between those. Its steps will be 0.0, 0.5 and 1.0, and if the relationship is linear, then the frequency set by that intermediate step will be 1,000 MHz. If it’s greater than that, the relationship will be non-linear, tending to a higher frequency for that step. The following charts compare those normalised frequencies with steps evenly spaced between idle and maximum frequencies.

This chart shows normalised frequencies and steps for E cores in base M1 and M5 chips, the latter in red. It shows how, over those five years, the number of steps (available frequencies) has increased. In the M1, the frequency selected in the middle of its five steps was half-way between idle and maximum. Not only does the M5 have more intermediate frequencies available, six instead of three, but frequencies used in the upper half of its steps are higher than in the M1 (when normalised).

This tends to boost higher frequencies used for running threads that can’t be accommodated on P cores, while running background threads at slightly lower frequencies than would be expected when at frequencies close to idle, as they are.

These curves have undergone evolution across different families, as shown here in a composite of the curves for all five families. The red curve of the M5 deviates more from the M1’s straight line of identity than any of the others, particularly at the top end.

The equivalent comparison between frequencies of P cores in M1 and M5 chips shows a different picture. The M1 is again the simpler, being linear until it reaches a step of 0.8, while the M5 has higher frequencies in all except the top few values.

Shown here alongside curves for all earlier families, the red curve for the M5 has higher frequencies for every step apart from the last few.

Taken with the trends seen in the frequency ranges (bar charts above), these demonstrate that the M5 is designed to improve performance by increasing the frequencies used to run threads with higher Quality of Service, as opposed to background threads.

Conclusions

• CPU core frequencies in the M3 Ultra are the same as the M3 Max.
• The base M5 continues the trend for higher frequencies in both E and P cores, with a marked rise in P core idle frequency.
• More subtle changes in intermediate frequencies boost them for higher frequencies of E cores, where they’re likely to improve performance of threads overflowed from P cores.
• Intermediate core frequencies continue to be selected to optimise performance and power use.

Apple silicon chips are designed to minimise the power and energy they use without compromising their performance. One of the many tricks they use is to run the cores in their CPUs at variable frequencies, and in more recent models to shut down those cores they don’t need. At the start of the year, thanks to the many who contributed information about their Macs, we were able to assemble a table of CPU core frequencies for all the M-series chips then available. Those demonstrated that frequencies differed between families such as M1 and M2, and between models within each family such as M2 Pro and Max, as well as between P and E cores.

Since then Apple has released two new chips, the M3 Ultra available in the current Mac Studio, and most recently the base M5 that has recently been impressing so many. This article briefly reviews what we know about CPU core frequencies, and appeals for information about those two new chips.

The best way to discover which frequencies are supported by the P and E cores in the CPU of an Apple silicon chip is using the output of the command tool powermetrics. This lists frequencies for P and E cores, and this article assumes that those it gives are correct. Although it’s most likely that these frequencies aren’t baked into silicon, so could be changed, I’ve seen no evidence to suggest that Apple has done that in any release Mac.

Frequencies

If powermetrics is to be believed, then the maximum frequencies of each of the CPU cores used in each generation differ from some of those you’ll see quoted elsewhere. Correct values should be:

• M1 E 2064 MHz or 2.1 GHz; P 3228 MHz or 3.2 GHz;
• M2 E 2424 MHz or 2.4 GHz; P 3696 MHz or 3.7 GHz;
• M3 E 2748 MHz or 2.7 GHz; P 4056 MHz or 4.1 GHz;
• M4 E 2892 MHz or 2.9 GHz; P 4512 MHz or 4.5 GHz.

However, not all variants within a family can use those maximum frequencies. The full table of frequencies reported by powermetrics is:

This is available for download as a Numbers spreadsheet and in CSV format here: mxfreqs

Why those frequencies?

Depending on workload, thread Quality of Service, power mode, and thermal status, macOS sets the frequency for each cluster of CPU cores. Those used range between the minimum or idle, and the maximum, usually given as the core’s ‘clock speed’ and an indication of its maximum potential performance. In between those are as many as 17 intermediate frequencies giving cores great flexibility in performance, power and energy use. Core design and development uses sophisticated models to select idle and maximum frequencies, and evidently to determine those in between.

Looking at the table, it would be easy to assume those numbers are chosen arbitrarily, but when expressed appropriately there are patterns. Apple’s engineers have clearly put considerable effort into picking optimised frequencies for each of the families and variants within them. If you think this is fine detail and only the maximum frequencies count, then bear in mind that both P and E cores spend a lot of their time running at those intermediate frequencies.

How to report frequencies

If you have a Mac Studio M3 Ultra or MacBook Pro M5 you can add to this collection, please open Terminal and run the command
sudo powermetrics -n 1 -s cpu_power
which then prompts you for your admin password. A few seconds later the window will fill with a single set of measurements looking like this:

All I’d like is a copy containing 3 lines from that:

• Machine model at the top, to tell me which Mac it is, thus which chip.
• E-Cluster HW active residency, which contains a list of frequencies for the E cores.
• P-Cluster HW active residency, which contains a longer list of frequencies for the P cores.

To help, I have highlighted those three lines in the screenshot above.

Thank you.